Monday, September 24, 2012

Simulating Power Supply Noise

Designs ranging from transceiver chips for smart phones to radar assemblies for fighter jets require power supply noise immunity testing, which is often referred to as power supply rejection ratio (PSRR) testing. Characterizing the design’s ability to reject or attenuate supply noise is critical because the noise can manifest itself as bit errors in the case of transceiver chips and inaccurate target data in the case of radar assemblies. In this post, we will discuss the challenges involved in simulating power supply noise signals for PSRR testing and look at two economical methods for doing it.

Challenges in simulating power supply noise
When you test PSRR, one challenge is modulating a quantitative noise signal onto a DC power supply level. This task is difficult because the power supply inputs typically present extremely low input impedance to any AC signal because of the high input parallel capacitance. While high-performance power supplies do have built-in arbitrary waveform capability, the output bandwidth of power supply waveforms is typically limited to less than 30 KHz. This limitation only allows you to simulate low frequency noise sources, such as power line ripple. It falls well short of the more critical noise source frequency ranges, such as power supply switching noise which ranges from 50 KHz to greater than 20 MHz.

To put the first challenge in perspective, let’s consider an example transceiver chip for a smart phone. The power supply input most likely has a parallel 1-uF bypass ceramic capacitor as well as a large 10-uF electrolytic capacitor to serve as an energy reservoir for the sharp transmit transients. That means a 1-MHz sinewave modulated onto the power supply level of the RF power amplifier would, in theory, only see a load of less than 20 mOhms. In practice, the equivalent series resistance (ESR), equivalent series inductance (ESL), and other parasitic impedances boosts the load impedance up to more than 50 mOhms, but that still presents low input impedance to any AC signal content.

Let's look at two solutions for simulating power supply noise that use (for the most part) general-purpose test equipment and simple components that you can find around the office or lab.

The op amp/MOSFET solution (OMS)
The OMS solution can be seen in the below figure. The solution requires two power supplies, a function/arbitrary waveform generator (FG/AWG), an op amp, and a high-power N-type MOSFET. In Figure 1, C1, C2, and the resistance value labeled “Load” make up a circuit representation of the device under test’s power supply input.

The OMS solution uses the MOSFET as a variable resistor between the power supply and the DUT (load). By varying the MOSFET’s drain to source resistance we can modulate the power supply's DC level with the desired noise signal. The op amp is used to maintain the desired voltage level at the DUT. With the op amp's inverting input connected to the same node as the input to the load, the op amp will drive the MOSFET's gate such that the amplitude level at its inverting input is the same as the amplitude at its non-inverting input.

The FG/AWG’s output creates the amplitude level and noise signal at the DUT's input. The power supply output voltage should be set comfortably higher than the desired amplitude plus any added noise signal amplitude to ensure the MOSFET stays properly biased. This OMS circuit allows you to accurately generate noise signals with bandwidths up to about 500 KHz. The bandwidth can vary depending on the DUT's input impedance and how well the OMS circuit was constructed. For best results, keep wiring and leads as short as possible to prevent oscillations.

As an example, the OMS circuit was implemented using an Agilent 33521A function/arbitrary waveform generator, N6762A power supply, E3630A dual-output power supply (to power the op amp), an IRFP150N N-type MOSFET, and an NE5534A op amp. The below scope capture shows the example OMS implementation generating a 200-mVpp 500-KHz sine wave onto a 5-VDC level. The same DUT load shown in the above diagram was used for this example, the 100-uF capacitor is electrolytic and the 1-uF capacitor is ceramic.

When you implement the OMS, you will need to use a high-performance power supply because you need a supply with a fast transient response and a stable output to ensure the supply can handle the rapidly varying load levels caused by the noise signal. Also, in the OMS the DC level value is limited to the max voltage of the FG/AWG, which today is typically 10 V. To overcome this limitation, you could add a voltage amplifier between the op amp and the FG/AWG.

Amplified modulation solution (AMS)
The AMS does not have the voltage or bandwidth limitations that the OMS has, but it does have a higher price tag. The AMS is shown in the below figure. The AMS consists of a power supply, FG/AWG or signal generator, wide-band or RF power amp and coupling capacitor section.

The FG/AWG and RF amp are used to modulate the DC level from the power supply with the desired noise signal. The coupling capacitor section blocks the DC level from the RF amp's input and provides a low-impedance path for the AC output of the power amp. The power amplifier is needed to boost the noise signal power to deal with the low impedance to AC that the DUT's input presents. You'll want to make the coupling capacitor section's impedance as low as possible, so you may want to use multiple capacitor values and types in parallel to reduce the effects of ESR and ESL. The exact circuit setup, the DUT's true input impedance, and the bandwidth of the noise signal will all determine how many watts the RF amp should be. A good place to start is 50 W, and you can go up from there. Note that the RF amp's output impedance should be as low as possible, which is typically going to be 50 ohms. With the DUT's impedance being so low, the RF amp will see a large amount of reflected power at its input, so when you choose an RF amplifier, be sure to select one that can handle a short-circuit condition.

As an example, the AMS circuit was implemented using an Agilent 33521A function/arbitrary waveform generator, an N6762A power supply, an E&I 1040L RF power amplifier, and 10-uF and 0.1-uF capacitors in parallel (for the coupling capacitor section). A 1040L RF amp provided up to 400 W of output power, which was more than necessary, but I used what was available to me in the lab. Using the same load used in the OMS example, the AMS was used to create a single tone noise signal. The below scope capture shows a 1-Vpp 5-MHz sinewave was modulated onto a 10-VDC level.

Test and measurement power supplies typically have a high capacitance value at their output. In the AMS, the power supply is in parallel with the load in regards to the RF amp’s output. That means the noise signal actually has two low-impedance paths to take, the load and the power supply output. It is hard to know the power supply’s AC power handling characteristic across its input capacitance since it is not specified by the power supply manufacturer, so you may want to contact the manufacturer to avoid costly damage.

One safety precaution you can take is adding blocking impedance between the power supply output and the coupling capacitor section. The blocking impedance can either be an inductor or a resistor. Its purpose is to protect the power supply from being damaged by the noise signal by adding higher series impedance before the power supply output. The inductor is ideal because it acts like a short to the DCV from the power supply, but presents high impedance to the AC noise signal. However, the inductor can cause large oscillations on the DC level if the DUT has a very dynamic current.

Using a resistor avoids the oscillations problem. Be sure to use the power supply’s sense leads to regulate the output voltage at the load to compensate for the voltage drop across the resistor. Also be sure to use a low-value resistor no higher than 1 Ohm. This is to ensure a low voltage drop across the resistor so you do not damage the sense lead circuit on the power supply.

PSRR testing is required on a wide range of devices today from smart phone chips to electronic assemblies for aircraft. Testing PSRR includes generating high-frequency noise signals on power supply levels. This task is challenging due to the high capacitance present at most power supply inputs. In this article we looked at two low-cost solutions for modulating noise signals on power supply levels. If you have any questions on the post send me an email and if you have anything to add use the "Comments" section below.

Monday, September 17, 2012

Overview of Oscilloscope Triggering

In this post we will take a look at Oscilloscope triggering. We will cover the basics and look at some of the advanced triggering capabilities found in modern digital scopes. Triggering is often the least understood but one the most important capabilities of a scope. You can think of oscilloscope triggering as “synchronized picture taking”. And one waveform picture actually consists of many individual and consecutive digitized samples. When monitoring a repetitive input signal the oscilloscope performs repetitive acquisitions (or repetitive picture taking) to show a “live” picture of your input signal. This repetitive picture taking of the oscilloscope must be synchronized to a unique point on the input signal in order to show a stable waveform on the scope’s display.

Although some scopes have various advanced triggering modes to choose from, the most common type of triggering is to trigger the scope when the input signal crosses a particular voltage threshold level in either a positive or negative direction. We call this “edge triggering”. In other words, the scope triggers (takes pictures) when the input signal changes from a lower voltage level to a higher voltage level (rising edge trigger) or when the input signal changes from a higher voltage level to a lower voltage level (falling edge trigger). A photo finish of a horse race is analogous to oscilloscope triggering. To accurately record the finish of the race, the camera’s shutter must be synchronized to when the lead horse’s nose crosses the finish line in the forward direction.

Edge Triggering Examples
Let's look at two examples of oscilloscope edge triggering. In the screen-shot below, the scope’s trigger level is set above the waveform. In this case the input signal never crosses the trigger threshold level in any direction. The scope is taking asynchronous pictures of the input signal and we observe what appears to be an unstable waveform. This is actually an example of not triggering – or unsynchronized picture taking.

Untriggered (unsync'd picture taking)
In the below screen-shot, the scope is setup to trigger on rising edges of the input signal with the trigger level set at +2.01 V. In this case, we can see a rising edge of the input signal at exactly center-screen. 

Triggering on Rising Edge @ +2.01 V
Although the default trigger localization on all digital oscilloscopes is at center-screen (horizontally), you can re-position the trigger location to the left or right by adjusting the horizontal delay knob – sometimes called the horizontal position knob. Older technology analog scopes are only able to trigger at the left side of the screen. This means that analog oscilloscopes are only capable of showing portions of waveforms that occur after the trigger event – sometimes called “positive time data”. But DSOs are able to show portions of waveforms both before (negative time or pre-trigger data) and after (positive time data) the trigger event. Observing pre-trigger data can be useful for analyzing waveform data that may have led up to a specific error trigger condition.

Edge triggering is by far the most common method used for scope triggering. Modern digital scopes also include many advanced triggering methods such as Pulse Width, Pattern, and Runt. Let's take a quick look at a few advanced triggering methods in modern scopes.

Advanced Oscilloscope Triggering – Rise/Fall Time
The below screen shot is an example of signal parametric violation triggering. In this case we are showing an example of triggering on a rising edge that fails to meet a specified rise time of 100 ns. This scope can also trigger on falling edge violations, as well as edge speeds that are faster than a user-specified time.

Triggering on rising edges if slower than 100 ns
Advanced Oscilloscope Triggering – Setup & Hold Time
In the below screen-shot we showing an example of a setup & hold time violation. The scope has been setup to trigger on a rising edge of a clock signal (channel-1, yellow trace). The green trace shows the channel-2 waveform, which is a data signal represented as an eye-diagram. When writing data into a storage device, shift register, or latch, the data signal must be stable for a minimum amount of time before the arrival of the clock signal. This is called “setup time”. In addition, the data signal must remain stable (high or low) for a minimum specified time. This is known as “hold time”. 

Edge Triggering Reveals Data Edge Shift
In this particular example we can see that the data signal occasionally shifts in the positive time direction closer to the clock edge. We know that it is an occasional or infrequent timing shift as evidenced by the dimmer intensity of the trace (assuming that the scope has waveform intensity gradation capability). This is a violation of the device’s setup time.

In this post we looked at oscilloscope triggering, from basic to advanced. If you have anything to add to this post use the "Comments" section below and if you have any questions send me an email.

Monday, September 10, 2012

Overview of Agilent's New M9381A PXI Vector Signal Generator

The following video gives a great overview of Agilent's new M9381A PXI Vector Signal Generator. The M9381A delivers Agilent quality and performance in the PXI form factor. The M9381A is blazing fast with 10 us switching speed, provides 160 MHz of RF modulation bandwidth, and better than +/- 0.4 dB amplitude accuracy.