The Arbitrary Waveform Generator (AWG) is an instrument you will probably find on the bench of most electrical engineers. It allows you to produce a variety waveforms from built in functions like square and sine to arbitrary user defined waveforms. As AWG technology progresses, it opens the door for new applications. In this two part blog post we will look how to use an AWG to simulate jitter on digital clock and communication signals. This is extremely useful when doing noise immunity and BER testing on digital circuits.

AWGs have always been a great way to create serial data or clock signals as you have the ability to produce accurate signals with very precise edge placements. Usually you can place an edge crossing to better than 1/100th of the sample interval of the AWG. With this accuracy you are able to add sub-nanosecond timing error to clock or data signals to test your systems susceptibility to jitter. With basic AWG waveform memories now in the millions of points, you are now able to add jitter to longer pulse patterns in more interesting ways.

Jitter is defined as the deviation in or displacement of some aspect of the pulses in a digital signal. What is most often characterized is the Time Interval Error (TIE) which is the timing deviation of the edge crossing of the serial data signal relative to a clock. This can also be the timing deviation of a clock relative to an ideal clock.

Jitter and TIE can end up on a signal through a variety of mechanisms. For example, jitter can be the result of spurious coupling from a switching power supply to the digital systems clock signal. A designer would be prudent to test his systems vulnerability to such an occurrence. While there are many more expensive solutions for injecting jitter onto a clock signal, most AWGs are perfectly capable of simulating this kind of jitter.

You can change the edge crossing position of an arbitrary waveform very precisely in steps on the order of the sample period of the AWG (1/sample rate) divided by its vertical resolution in bits. You also want to pay close attention to the AWG's jitter spec, which specifies the amount of jitter error that the AWG will add to your "ideal" digital signal. Modern AWGs will have jitter specs < 100 ps, for instance Agilent's 33521/22A AWGs have a jitter spec of < 40 ps. Now we need a mathematical algorithm that allows us to easily create our digital pulses and allows us to easily manipulate the pulse edges to simulate jitter. Lets first start out with creating the pulses using the error function (ERF), which is the integral of the Gaussian or Normal Distribution. The ERF is defined and plotted as (click to enlarge):

The ERF gives a positive step from -1 to 1 with the zero crossing at t0. In the Gaussian distribution σ

AWGs have always been a great way to create serial data or clock signals as you have the ability to produce accurate signals with very precise edge placements. Usually you can place an edge crossing to better than 1/100th of the sample interval of the AWG. With this accuracy you are able to add sub-nanosecond timing error to clock or data signals to test your systems susceptibility to jitter. With basic AWG waveform memories now in the millions of points, you are now able to add jitter to longer pulse patterns in more interesting ways.

Jitter is defined as the deviation in or displacement of some aspect of the pulses in a digital signal. What is most often characterized is the Time Interval Error (TIE) which is the timing deviation of the edge crossing of the serial data signal relative to a clock. This can also be the timing deviation of a clock relative to an ideal clock.

Jitter and TIE can end up on a signal through a variety of mechanisms. For example, jitter can be the result of spurious coupling from a switching power supply to the digital systems clock signal. A designer would be prudent to test his systems vulnerability to such an occurrence. While there are many more expensive solutions for injecting jitter onto a clock signal, most AWGs are perfectly capable of simulating this kind of jitter.

You can change the edge crossing position of an arbitrary waveform very precisely in steps on the order of the sample period of the AWG (1/sample rate) divided by its vertical resolution in bits. You also want to pay close attention to the AWG's jitter spec, which specifies the amount of jitter error that the AWG will add to your "ideal" digital signal. Modern AWGs will have jitter specs < 100 ps, for instance Agilent's 33521/22A AWGs have a jitter spec of < 40 ps. Now we need a mathematical algorithm that allows us to easily create our digital pulses and allows us to easily manipulate the pulse edges to simulate jitter. Lets first start out with creating the pulses using the error function (ERF), which is the integral of the Gaussian or Normal Distribution. The ERF is defined and plotted as (click to enlarge):

^{2 }is the variance or the measure width of the distribution. The correlation of σ to the width of the rising edge in the error function gives a 10-90 risetime of about 2σ. The negative step or falling edge is defined as the ERF function multiplied by -1. The only limitation is that σ needs to be greater than 2 AWG sample periods in order to ensure adequate oversampling.

That will do it for part 1. In part 2 we will see how we can use the ERF to simulate jitter on a digital signal. We will go over some examples using Matlab code and Agilent's 33522A.

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Oh, Gosh. It's too hard for me. How did you come up with this? I'm a newbie in a BER testing, hoped that after your article everything becomes clear for me, but I was wrong. I still have many questions on how to use an AWG to simulate jitter. Fortunately, have some geek in mind, nearby, to help me. In the time when all students had affairs, he studied hard. So, now, despite the dubious sexual life, he is a pretty successful engineer.

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